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data brief for further information contact your local stmicroelectronics sales office. february 2012 doc id 022668 rev 2 1/16 1 STA8088TG gps/galileo/glonass/qzss tracker features stmicroelectronics ? 3 rd generation positioning receiver with 32 tracking channels and 2 fast acquisition channels compatible with gps, galileo and glonass systems hosted optimized architecture where host resources are available to execute ? positioning software ?st-agps ? dead reckoning sw embedded ram enough for running acquisition/tracking tasks (flashless solution) tcxo clock out available embedded rf front-end with separate gps/galieo/qzss and glonass if outputs embedded low noise amplifier -162 dbm indoor sensitivity (tracking mode) fast ttff < 1 s in hot start and 35 s in cold start high performance arm946 mcu (up to 208 mhz) 256 kbyte embedded sram 2 uarts 3 embedded 1.8 v voltage regulators i/o level selectable 1.8 v or 3.3 v operating condition: ?v dd12 : 1.2 v 10% ?v dd18/rf18 : 1.8 v 5% ?v lpvr 1.62 v to 3.6 v ?v ddio : 1.8 v 5%; 3.3 v 10% st automotive grade compliant packages: ? vfqfpn56 (7x7x0.85mm) 0.4 mm pitch ? vfqfpn56 (8x8x0.85mm) 0.5 mm pitch ambient temperature range: -40/+85c description STA8088TG is a host based positioning receivers ic working on multiple constellations (gps/galileo/glonass/qzss). STA8088TG family enables telematic and handset manufacturers to differentiate in the market by providing the best performing solution at lowest system cost. the device is offered with a complete gnss firmware which performs all gnss operations including tracking, acquisition, navigation and data output compatible with different host operating systems. vfqfpn56 www.st.com
contents STA8088TG 2/16 doc id 022668 rev 2 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 vfqfpn56 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5 test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.6 rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.7 port 0 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.8 port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 vfqfpn56 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 STA8088TG list of tables doc id 022668 rev 2 3/16 list of tables table 1. power supply pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 2. main function pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 3. test/emulated dedicated pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. rf front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 5. port 0 pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 6. port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 7. vfqfpn56 7 x 7 x 0.85 mm package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 8. vfqfpn56 8 x 8 x 0.85 mm package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 9. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 list of figures STA8088TG 4/16 doc id 022668 rev 2 list of figures figure 1. STA8088TG system block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. vfqfpn56 connection diagram (bottom view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 3. vfqfpn56 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 4. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 STA8088TG overview doc id 022668 rev 2 5/16 1 overview STA8088TG is a highly integrated system-on-chip device designed for positioning systems applications. the embedded sram combined with a high performance arm946 microprocessor allows the running of acquisition/tracking tasks without the need of external flash. the rf front-end and gnss engines are able to support simultaneously gps/galileo/glonass and qzss navigation systems. the device is power supplied with 1.8 v and uses three on-chip voltage regulators to internally supply the rf front-end, core logic and the backup logic. in order to reduce the power consumption the chip can be directly powered with 1.2 v bypassing the embedded voltage regulators which will be put in power down mode. i/o lines are compatible with 1.8 v and 3.3v. the chip, using stmicroelectronics cmosrf technology, is housed in either vfqfpn56 (7 x 7 x 0.85 mm) or vfqfpn56 (8 x 8 x 0.85 mm) packages. the st automotive grade devices (see figure 4: ordering information scheme ) with in addition to aec-q100 qualification include a set of production flow methodology targeting zero defect per million. they, fulfilling high quality and service level automotive market requirements, are the ideal solution for in-dash navigation and oem telematic application. STA8088TG family enables telematic and handset manufacturers to differentiate in the market by providing the best performing solution at lowest system cost. pin description STA8088TG 6/16 doc id 022668 rev 2 2 pin description 2.1 block diagram figure 1. STA8088TG system block diagram bk_dom a in vic rom 16kb ahb dcreg o s ci 3 2 o s ci 3 2 o s ci 3 2_lj_1v 8 pwr, r s t & clk ctrl i s o cell ss p regmap apb bridge2 uart2 rx - tx uart f u ll mtu gpio wd apb arm 946 i-c a che 16kb d-c a che 8 kb high s peed i - tcm 64kb 64khigh s peed d ? tcm 8 apb bridge1 s y s ctrl rtc apb ram 8 kb g 3 b as e b a nd glon ass if galgp s if 2 f as t ac q ch a nnel 3 2 trk ch a nnel s m u x ac q ram s apb bridge dc_ln_1v 8 to1v2 hpreg lpreg bkreg clock_gen ckx2 pll pg_650x frc_dpll rio s c47 te s t controller io s jtag g 3 rf ip 1. 8 v 1.2v dcreg s pi if o s ci 26mhz rf s ection lna s ection adc galgp s adc glona ss i/d s witchable tcm 8 x16kb gapgcft00541 STA8088TG pin description doc id 022668 rev 2 7/16 2.2 vfqfpn56 pin configuration figure 2. vfqfpn56 connection diagram (bottom view) 4 - 3 4 2 3 4 n % 0 6 $ $ ? - 6 2 4 0 ? ) & |